In the field of data processing, there is an ever increasing demand for graphics and full-motion video applications which are faster, more detailed, and generally more lifelike than their predecessors. Many of these applications are useful in commercial, educational, military, and personal data processing systems. In addition, the rapid acceleration of Internet applications is mandating high performance graphics and multimedia features in newly released computer systems.
High speed two-dimensional and three-dimensional graphics processing requires fast processing in order to provide realistic detail and to implement special effects, such as texture maps, alpha blending, and Z-buffering.
Texture maps provide life-like surfaces and shadows within a three-dimensional image. Alpha blending allows two graphics objects to be blended together. Z-buffering (or hidden surface removal) tracks the depth of objects from the perspective of the viewer to ensure that objects behind others in a scene don't appear until the viewer has them in his or her line of sight.
Since most if not all data used for graphics display, including the above-mentioned special effects, is stored in memory, current graphics computer software has a huge demand for memory bandwidth, i.e. the ability to move large amounts of data quickly throughout the data processing system.
The Accelerated Graphics Port (AGP) is a bus specification developed by Intel Corporation that enables high performance two-dimensional and three-dimensional graphics to be displayed quickly on ordinary personal computers. AGP uses the computer's main storage, also known as RAM (random access memory), to store graphics data. Graphics data can be accessed, transferred, manipulated, and processed for display by one or more processors in the data processing system, including special-purpose graphics processors.
Intel Corporation designs, manufactures, and sells chipsets to support advanced graphics functions in data processing systems. A chipset is a group of microchips designed to work and to be sold as a unit in performing one or more related functions.
An AGP chipset, in conjunction with a data processing system, such as a personal computer, achieves high performance at a reduced cost, compared with expensive graphics work stations, by utilizing main memory as if it were an extension of the graphics memory, so that significantly more storage space is available for graphics data, which permits a significant increase in realism and visual quality.
In addition, AGP-based systems allow advanced graphics data to be accessed directly from main memory during on-screen rendering rather than being first accessed from main memory and temporarily stored in the relatively smaller (and more expensive per storage size) local graphics memory, thus improving memory bandwidth and latency (i.e. the speed at which data is accessed from memory and transferred to where it is needed in the system) and lowering the overall system cost for equivalent performance.
System memory is typically organized into pages. Graphics chipsets generally prefer to access data structures such as texture maps as a contiguous block of data, rather than as fragmented pages stored here and there throughout the system memory. AGP chipsets thus are provided with core logic to translate addresses through a memory-based graphics address remapping table (GART). The GART is typically located in main memory, although it can be located in a dedicated memory. The GART and its associated GART driver can map random pages into a single, contiguous, physical address space.
An important function performed by the GART driver is to fill up the GART with page addresses. Each GART entry corresponds to a page in the main memory.
Until recently, both the chipset and the operating system supported a common page size, for example 4 kilobytes (KB). Therefore, the GART driver performed a straight-forward 1:1 mapping between chipset pages and operating system pages.
However, chipsets and operating systems being developed for future release will not necessarily support the same size page. If pages are mapped by the GART driver on a 1:1 basis, large amounts of system memory space can be wasted. For example, if each operating system page is 16 KB, and each chipset page is 4 KB, then a 1:1 mapping would waste (16 KB−4 KB=12 KB) of memory for each operating system page that is mapped by the GART driver.
For the reasons stated above, there is a substantial need in the data processing art to provide a method and apparatus for mapping pages of disparate sizes.